Solar power from solar cells has been predominantly provided by silicon semiconductor technology. In the past several years, however, high-volume manufacturing of III-V compound semiconductor multijunction solar cells for space applications has accelerated the development of such technology. Compared to silicon, III-V compound semiconductor multijunction devices have greater energy conversion efficiencies and generally more radiation resistance, although they tend to be more complex to properly specify and manufacture. Typical commercial III-V compound semiconductor multijunction solar cells have energy efficiencies that exceed 29.5% under one sun, air mass 0 (AM0) illumination, whereas even the most efficient silicon technologies generally reach only about 18% efficiency under comparable conditions. The higher conversion efficiency of III-V compound semiconductor solar cells compared to silicon solar cells is in part based on the ability to achieve spectral splitting of the incident radiation through the use of a plurality of photovoltaic regions with different band gap energies, and accumulating the current from each of the regions.
Typical III-V compound semiconductor solar cells are fabricated on a semiconductor wafer in vertical, multijunction structures or stacked sequence of solar subcells, each subcell formed with appropriate semiconductor layers and including a p-n photoactive junction. Each subcell is designed to convert photons over different spectral or wavelength bands to electrical current after the sunlight impinges on the front of the solar cell, and photons pass through the subcells, with each subcell being designed for photons in a specific wavelength band. After passing through a subcell, the photons that are not absorbed and converted to electrical energy propagate to the next subcells, where such photons are intended to be captured and converted to electrical energy.
The individual solar cells or wafers are then disposed in horizontal arrays, with the individual solar cells connected together in an electrical series and/or parallel circuit. The shape and structure of an array, as well as the number of cells it contains, are determined in part by the desired output voltage and current needed by the payload or subcomponents of the payload, the amount of electrical storage capacity (batteries) on the spacecraft, and the power demands of the payloads during different orbital configurations.
A solar cell designed for use in a space vehicle (such as a satellite, space station, or an interplanetary mission vehicle), may have a sequence of subcells with compositions and band gaps which have been optimized to achieve maximum energy conversion efficiency for the AM0 solar spectrum in space. The AM0 solar spectrum in space is notably different from the AM1.5 solar spectrum at the surface of the earth, and accordingly terrestrial solar cells are designed with subcell band gaps optimized for the AM1.5 solar spectrum.
There are substantially more rigorous qualification and acceptance testing protocols used in the manufacture of space solar cells to ensure that space solar cells can operate satisfactorily at the wide range of temperatures and temperature cycles encountered in space. These testing protocols include (i) high-temperature thermal vacuum bake-out; (ii) thermal cycling in vacuum (TVAC) or ambient pressure nitrogen atmosphere (APTC); and in some applications (iii) exposure to radiation equivalent to that which would be experienced in the space mission, and measuring the current and voltage produced by the cell and deriving cell performance data.
As used in this disclosure and claims, the term “space-qualified” shall mean that the electronic component (i.e., the solar cell) provides satisfactory operation under the high temperature and thermal cycling test protocols. The exemplary conditions for vacuum bake-out testing include exposure to a temperature of +100° C. to +135° C. (e.g., about +100° C., +110° C., +120° C., +125° C., +135° C.) for 2 hours to 24 hours, 48 hours, 72 hours, or 96 hours; and exemplary conditions for TVAC and/or APTC testing that include cycling between temperature extremes of −180° C. (e.g., about −180° C., −175° C., −170° C., −165° C., −150° C., −140° C., −128° C., −110° C., −100° C., −75° C., or −70° C.) to +145° C. (e.g., about +70° C., +80° C., +90° C., +100° C., +110° C., +120° C., +130° C., +135° C., or +145° C.) for 600 to 32,000 cycles (e.g., about 600, 700, 1500, 2000, 4000, 5000, 7500, 22000, 25000, or 32000 cycles), and in some space missions up to +180° C. See, for example, Fatemi et al., “Qualification and Production of Emcore ZTJ Solar Panels for Space Missions,” Photovoltaic Specialists Conference (PVSC), 2013 IEEE 39th (DOI: 10.1109/PVSC 2013 6745052). Such rigorous testing and qualifications are not generally applicable to terrestrial solar cells and solar cell arrays.
The space solar cells and arrays experience a variety of complex environments in space missions, including the vastly different illumination levels and temperatures seen during normal earth orbiting missions, as well as even more challenging environments for deep space missions, operating at different distances from the sun, such as at 0.7, 1.0 and 3.0 AU (AU meaning astronomical units), or in other words, distances from the sun of respectively 104.7 million km, 149.6 million km and 448.8 million km respectively. The photovoltaic arrays also endure anomalous events from space environmental conditions, and unforeseen environmental interactions during exploration missions. Hence, electron and proton radiation exposure, collisions with space debris, and/or normal aging in the photovoltaic array and other systems could cause suboptimal operating conditions that degrade the overall power system performance, and may result in failures of one or more solar cells or array strings and consequent loss of power.
A further distinctive difference between space solar cell arrays and terrestrial solar cell arrays is that a space solar cell array utilizes welding to provide robust electrical interconnections between the solar cells, while terrestrial solar cell arrays typically utilize solder for electrical interconnections. Welding is required in space solar cell arrays to provide the very robust electrical connections that can withstand the wide temperature ranges and temperature cycles encountered in space such as from −175° C. to +180° C. In contrast, solder joints are typically sufficient to survive the rather narrow temperature ranges (e.g., about −40° C. to about +50° C.) encountered with terrestrial solar cell arrays.
A further distinctive difference between space solar cell arrays and terrestrial solar cell arrays is that a space solar cell array may utilize silver-plated metal material for interconnection members, while terrestrial solar cells typically utilize copper wire for interconnects. Useful metals include, for example, molybdenum; a nickel-cobalt ferrous alloy material designed to be compatible with the thermal expansion characteristics of borosilicate glass such as that available under the trade designation KOVAR from Carpenter Technology Corporation; a nickel iron alloy material having a uniquely low coefficient of thermal expansion available under the trade designation Invar, FeNi36, or 64FeNi; or the like.
A further distinctive difference of a space solar cell from a terrestrial solar cell is that the space solar cell normally includes a cover glass over the semiconductor device to provide radiation resistant shielding from particles in the space environment which could damage the semiconductor material. The cover glass is typically a ceria doped borosilicate glass which is typically from three to six mils (0.0762 to 0.1524 mm) in thickness and attached by a transparent adhesive to the solar cell.
Yet a further specific requisite for space applications relates to deployability of the solar cell array.
In summary, there are significant differences in design, materials, and configurations between a space-qualified III-V compound semiconductor solar cell and subassemblies and arrays of such solar cells, on the one hand, and silicon solar cells or other photovoltaic devices used in terrestrial applications, on the other hand. These differences are so substantial that prior teachings associated with silicon or other terrestrial photovoltaic system are simply unsuitable and have no applicability to the design configuration of space-qualified solar cells and arrays. Indeed, the design and configuration of components adapted for terrestrial use with its modest temperature ranges and cycle times often teach away from the highly demanding design requirements for space-qualified solar cells and arrays and their associated components.
The assembly of individual solar cells together with electrical interconnects and the cover glass form a so-called “CIC” (Cell-Interconnected-Cover glass) assembly, which are then typically electrically connected to form an array of series-connected solar cells. The solar cells used in many arrays often have a substantial size; for example, in the case of the single standard substantially “square” solar cell trimmed from a 100 mm wafer with cropped corners, the solar cell can have a side length of seven cm or more.
Bypass diodes are frequently used in solar cell arrays comprising a plurality of series connected solar cells or groups of solar cells. When all of the solar cells in an array are receiving sunlight or are illuminated, each solar cell will be forward biased. However, if any of the solar cells are not illuminated, because of shadowing or damage, those cells may become reversed biased in order to carry the current generated by the illuminated cells. This reverse biasing can degrade the cells and can ultimately render the cells inoperable. In order to prevent reverse biasing, a bypass diode is often connected in parallel with the solar cell.
The purpose of the bypass diode is to draw the current away from the shadowed or damaged cell. Since the bypass diode is in parallel with the solar cell, the current flows through the bypass diode and it becomes forward biased when the shadowed cell becomes reverse biased. Rather than forcing current through the shadowed cell, which would occur in the absence of a bypass diode, the diode draws the current away from the shadowed cell and maintains the series electrical connection to the next cell.
Bypass diodes may be used for each of the cells in a solar cell string or solar cell array. In alternative examples, a single bypass diode may be used for a string of solar cells. Such a bypass diode may be arranged at an end of the string.
Different types of bypass diodes have been utilized in prior art. One conventional method to provide bypass diode protection to a solar cell array has been to connect a bypass diode between adjacent cells, with the anode of the bypass diode connected to one solar cell and the cathode of the diode connected to an adjoining solar cell. However, this technique is complicated to manufacture and requires a very difficult and inefficient assembly method. Another technique for providing a bypass diode for each cell involves a recess next to each solar cell and a bypass diode being placed into this recess and connected in parallel with the solar cell to which it is attached.
Solar cells are often produced from circular or substantially circular wafers. For example, solar cells for space applications are typically multi-junction solar cells grown on substantially circular wafers. These circular wafers are sometimes 100 mm or 150 mm diameter wafers. However, as explained above, for assembly into a solar array (henceforth, also referred to as a solar cell panel), the circular wafers are often divided into other form factors to make solar cells. One preferable form factor for a solar cell for space is a rectangle, such as a square, which allows for the area of a rectangular panel consisting of an array of solar cells to be filled 100%, assuming that there is no space between the adjacent rectangular solar cells.
Placing the bypass diodes at the cropped corners of the solar cells can be an efficient solution as it makes use of a space that is not used for converting solar energy into electrical energy. As a solar cell array or solar panel often includes a large number of solar cells, and often a correspondingly large number of bypass diodes, the efficient use of the area at the cropped corners of individual solar cells adds up and can represent an important enhancement of the efficient use of space in the overall solar cell assembly.
As noted above, individual solar cells are connected sequentially to form a vertical column of an array. Such series connection requires an electrical path between the cathode or top layer of one cell with the anode or bottom layer of the adjacent cell. In particular, in solar cells with an integral bypass diode, a connection usually must be made from both the (multijunction) solar cell and from the bypass diode on the top surface of a first wafer to the bottom surface of the adjoining wafer.
Prior art interconnection arrangements have utilized a single electrical contact to the top layer (or anode) of the bypass diode. Although such an arrangement is generally satisfactory for most applications and reliability requirements, there are certain applications in which more stringent reliability is required. Further known interconnection members between solar cells include serpentine paths in order to increase flexibility.
Solar cell arrays for space applications are designed to last for a long period of time, e.g. 10 or 15 or 20 years. Continuous thermal loading throughout the life time of the solar cell array can lead to cracks in the interconnect members. An example of a prior art interconnection member is shown in FIG. 9. The interconnect member of FIG. 9 includes two connections pads 10A, 10B on a first side for connecting to a cathode of a first solar cell, whereas there are two areas 20A, 20B on the opposite side connected to an anode of a second solar cell. The first and second solar cell may be separated along a first direction 4 and the interconnect member bridges the distance between them. There are two curved serpentine paths 11, 12 in between the connection pads on the first side and the connection portions on the other. Both serpentine paths include a number of parallel portions extending along the transverse direction 6, i.e. perpendicular to the longitudinal direction and these parallel portions are connected by curved portions. The prior art interconnect members were found to be sensitive to cracking or separation, particularly under shear loads. Cracking was found to occur mainly in the curved portions of the serpentine paths.
It is an object of the present disclosure to provide interconnect members with improved reliability. It is a further object to provide interconnect members that are capable of enduring continuous thermal loading in space applications.